TI DSP 28335 XINTCNF2 register behavior and pipeline flushing

When running my program in flash with jtag the XINTCNF2 register was reading 0 on entry to main.
The TI documentation implied it should be something other than 0.
It turns out that if SYSCLKOUT is not enabled XINTCNF2 is 0. If it is enabled then the register reads-back as non zero. So the following is required:
EALLOW; SysCtrlRegs.PCLKCR3 = 0x1000U; XintfRegs.XINTCNF2 = XINTCNF2_VAL; EDIS;
It turns out that the above code is not sufficient to ensure that XINTCNF2 is set to the value I expect.
I ended up adding the following after setting PCLKCR3 and after setting XINTCNF2:
asm(" RPT #7 || NOP");
This ensures we fill the 28335 instruction pipeline so that any code accessing the registers that have been set occurs as new instructions to the processor. The TI doc's make no mention of this as an issue, though the TI examples show a pipeline flush after setting XINTF registers. This is for a safety critical system so I have to check that what has been written to a register has really occurred by a subsequent read (unless the bits always read 1 or 0 of course).

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